Yield refers to the proportion of manufactured devices that can be shipped as good, functioning products — one of the single most important metrics in semiconductor manufacturing.

For example:

・A yield of 90% means 10% of devices are defective.

・A yield of 50% means half of all devices are defective — a critical situation.

Semiconductor manufacturing operates on an extraordinarily expensive cost structure:

・EUV lithography equipment can cost hundreds of billions of yen.

・Materials are expensive (photoresist, wafers, and more).

・The manufacturing process is lengthy, involving hundreds of individual steps.

・Equipment runs continuously, 24 hours a day, 365 days a year.

Because of this cost structure, even a few percentage points of yield variation can have a major impact on profitability.

 

This is particularly true at leading-edge process nodes, where:

・Defect density

・Declining yield caused by continued miniaturization

・The stability of manufacturing equipment

all become decisive factors in a company’s competitiveness.

(1) Physical defects

・Particles (contamination)

・Scratches

・Foreign material contamination

・Chipping and cracking

A single piece of foreign material can render thousands of chips defective.

 

(2) Process abnormalities

・Variation in film thickness

・Uneven etching depth

・Uneven ion implantation dose

・Focus errors during lithography

As devices continue to shrink, tolerances become increasingly tight, and even nanometer-scale variation can result in defects.

 

(3) Design-related issues

・Layouts that are overly sensitive to manufacturing variation

・Current concentration

・Layouts prone to trapping heat

Design for Manufacturability (DFM) has become essential.

 

(4) Material-related causes

・Variation in photoresist characteristics

・Differences in gas purity

・Degradation of CMP slurry

・Crystal defects in the wafer itself

Close collaboration with materials suppliers is essential.

 

(5) Equipment condition

・Equipment degradation

・Component wear

・Cleaning cycle intervals

・Calibration drift

Equipment maintenance is, in many ways, the lifeblood of yield.

Improving yield ultimately comes down to accurate observation combined with accurate analysis.

Representative approaches

(1) SPC (Statistical Process Control)

A method of continuously monitoring equipment data — such as temperature, pressure, and film thickness — to detect abnormal trends early.

・Control charts

・Process capability indices (Cp/Cpk)

Leading-edge fabs have automated much of their SPC processes.

 

(2) FDC (Fault Detection and Classification)

A technology that analyzes thousands of equipment parameters in real time to detect early signs of abnormality.

Examples include:

・Plasma emission spectra

・Motor current

・Temperature waveforms

This approach pairs well with AI and is spreading rapidly across the industry.

 

(3) Defect inspection

・Optical microscopy

・SEM (scanning electron microscopy)

・AFM (atomic force microscopy)

・Electron-beam inspection

・X-ray inspection

These techniques are used to map the distribution of defects and identify the specific process step responsible.

 

(4) DOE (Design of Experiments)

A method for efficiently optimizing complex combinations of process conditions.

Examples include:

・Determining the optimal combination of deposition temperature, gas flow rate, and pressure

・Assessing how CMP pressure, pad choice, and slurry combine to affect yield

 

(5) Feedback loops (feed-forward / feed-back)

Using data from earlier process steps to inform later ones.

Examples include:

・Using lithography dimension data to adjust subsequent etching parameters

・Using CMP flatness data to adjust patterning conditions

Yield improvement is a cross-functional team effort, drawing on expertise from:

・Design (DFM)

・Process engineering

・Equipment engineering

・Quality assurance (QA)

・Materials suppliers

・Data scientists

Within a fab, this is considered one of the most challenging areas to master — and one of the areas that contributes most directly to a company’s profitability.

・AI-driven root cause analysis for identifying the source of defects

・Process prediction using digital twins

・Real-time monitoring across the entire wafer

・Advanced FDC combining deep learning with equipment data

・Countermeasures against defects unique to EUV lithography (mask defects, stochastic defects)

・The emerging challenge of “multi-die yield” caused by chiplet architectures

In particular, EUV-generation processes are seeing an increase in stochastic (probabilistic) defects, which are difficult to analyze using traditional methods — one of the single biggest challenges facing semiconductor fabs worldwide today.

・Yield is the single most important KPI determining a fab’s profitability.

・It’s influenced by process, materials, equipment, and design alike.

・SPC, FDC, DOE, and defect inspection form the basic toolkit for improvement.

・The industry has entered an era where AI-driven data analysis is essential.

・The difficulty of yield improvement continues to grow in the era of EUV and chiplet architectures.

1.Explain why even a few percentage points of yield variation can have such a large impact on profitability.

2.Briefly explain the difference between SPC and FDC.

3.Why is collaboration with materials suppliers so important for yield improvement?

 

Column Supervisor: Koji Kakumoto (Otis Group Co., Ltd.)

After studying abroad and working in planning and development at a trading company, he joined Otis Group Co., Ltd. in 2011. While primarily working in the Corporate Planning Department, he has also served concurrently in manufacturing and technical divisions, and since 2018 has served as Representative Director, working to drive business growth and strengthen the organization.

 

This article is a general technical explanation intended for educational purposes and does not refer to any specific company, product, or technology.