Semiconductor manufacturing is an industry built on the combination of materials, process, and equipment.

Among these, equipment is the single most important foundation for realizing requirements such as:

・Continued miniaturization (from 2nm down to 1nm)

・3D structures (evolving from FinFET to GAA)

・High aspect ratios (exceeding 100:1)

・New materials (high-k, low-k)

・High-density wiring

It’s not an exaggeration to say that the limits of technological progress are, in many ways, defined by the limits of equipment technology itself.

(1) What is EUV?

EUV lithography is an exposure technology that uses light with a wavelength of just 13.5nm.

This wavelength is dramatically shorter than that of conventional ArF lithography (193nm), making EUV the key enabling technology — and, in many ways, the ultimate lithography tool — for continued miniaturization.

 

(2) The structure and characteristics of EUV equipment

EUV systems are among the most complex machines ever built:

・A laser converts tin (Sn) into a plasma, generating EUV light.

・Because EUV light has very low reflectivity, the entire optical system relies on reflective optics rather than lenses.

・The mirrors themselves are built from multilayer Mo/Si coatings, consisting of more than 100 layers.

・A vacuum environment is essential.

・Even the photomask is reflective (an EUV mask).

A single EUV system costs on the order of 30 to 40 billion yen — an extraordinary price.

 

(3) Challenges facing EUV

・Mask defects

・Stochastic effects (probabilistic defects)

・Insufficient light source output

・Limits on exposure throughput

・Increasingly demanding mirror manufacturing precision as numerical aperture increases

Stochastic defects, in particular, are especially troublesome — much like grain in photographic film, small-scale randomness can directly affect the final result.

 

(4) High-NA EUV (0.55 NA)

The leading candidate for the next generation of lithography.

・Dramatically improves resolution.

・Essential for patterning at the 1nm scale.

・However, the equipment itself becomes enormous — roughly the height of two buses stacked together.

・Mask blur (the “mask 3D effect”) becomes an increasingly serious challenge.

Intel and ASML are expected to be the first to introduce this technology.

Nearly all fine-pattern processing takes place within a vacuum environment.

Why vacuum is necessary

・To avoid collisions between gas molecules

・To increase the purity of reactive gases

・To improve plasma stability

・To achieve more uniform film deposition

・To prevent surface contamination

Vacuum pumps, piping, and sealing technology are all critically important in this context.

 

The relationship between representative processes and vacuum conditions

・CVD → low pressure (as in LPCVD)

・PVD → high vacuum

・ALD → ultra-high vacuum with precise gas control

・Ion implantation → high vacuum

・EUV → extremely high vacuum (on the order of 10⁻⁶ Pa)

The quality of the vacuum environment directly affects yield.

Plasma plays a central role in etching, deposition, and surface treatment.

(1) What is plasma?

Plasma is an ionized gas — a mixture of electrons, ions, and neutral particles.

Its characteristics include:

・High-energy reactions

・Precise control over surface chemistry

・High reaction selectivity

・The ability to process materials without raising bulk temperature

 

(2) Plasma etching

Characteristics:

・Enables anisotropic processing, forming vertical sidewalls

・Supports high aspect ratios, exceeding 100:1

・Allows selectivity to be finely controlled

・Requires careful design to minimize plasma-induced damage

This technology is essential for forming trench shapes and TSVs in AI chips.

 

(3) Plasma deposition (such as PECVD)

Applications include:

・SiO₂

・SiN

・Low-k materials

・Passivation films

Plasma characteristics — including frequency, power, and gas composition — determine the resulting film quality.

 

(4) The latest developments in plasma technology

・Plasma sources for atomic layer deposition

・Damage-free etching techniques

・Low-energy ion control

・High-density plasma (ICP)

・Control of charge-induced damage within plasma

These remain core areas of focus for equipment manufacturers.

Gas control

・MFCs (Mass Flow Controllers)

・Precursors used for ALD and CVD

・Fine control over reaction rates

・Particle contamination management

 

Chemical control

・Managing hazardous materials such as HF and H₂O₂

・Wet etching processes

・Cleaning processes (such as SC-1 and SC-2)

The purity of both gases and liquid chemicals plays a direct role in determining yield.

A semiconductor fab operates as an interconnected collection of equipment. Recent developments include:

・AI-driven analysis of equipment data (FDC)

・Simulating equipment behavior through digital twins

・Integration with automated material handling systems (AMHS)

・Real-time process control (APC)

These are quickly becoming standard practice. Equipment technology no longer exists in isolation — optimizing the entire fab as a “smart fab” has become essential.

・The rollout of high-NA EUV

・Countermeasures against EUV mask blur

・Techniques for reducing stochastic defects

・Combined systems integrating ultra-high vacuum with plasma technology

・Hybrid processes combining ALD and etching

・Increasingly pure gases, down to the parts-per-trillion level

・AI-driven analysis of equipment data

In the EUV era in particular, it’s fair to say that the limits of equipment technology are essentially the limits of miniaturization itself.

・EUV, vacuum, and plasma technologies form the foundation of leading-edge semiconductor devices.

・Equipment performance is what ultimately determines the pace of miniaturization, from 2nm down to 1nm.

・Vacuum quality, temperature, and gas control all directly affect yield.

・As fabs continue moving toward “smart fab” operations, AI adoption has become essential.

・Understanding equipment technology is one of the most important skills a semiconductor engineer can have.

1.Why is a vacuum environment essential for EUV equipment?

2.Name two main reasons plasma is used in semiconductor processing.

3.Explain the background behind why high-NA EUV has become necessary.

 

Column Supervisor: Koji Kakumoto (Otis Group Co., Ltd.)

After studying abroad and working in planning and development at a trading company, he joined Otis Group Co., Ltd. in 2011. While primarily working in the Corporate Planning Department, he has also served concurrently in manufacturing and technical divisions, and since 2018 has served as Representative Director, working to drive business growth and strengthen the organization.

 

This article is a general technical explanation intended for educational purposes and does not refer to any specific company, product, or technology.