The package substrate simultaneously serves the following roles:

・Connecting the chip to the mounting board (PCB)

・Routing power and signals

・Mechanical support

・Heat spreading

Particularly for advanced SoCs and AI chips, we are now in a situation where the substrate determines performance, yield, and cost.

The current mainstream is the ABF (Ajinomoto Build-up Film) substrate.

Features:

・Enables high layer counts

・Supports fine wiring

・Dielectric properties suited to high-speed signals

Applications:

・CPUs

・GPUs

・AI accelerators

・Network SoCs

Even with fan-out and 2.5D packages, an ABF substrate is ultimately used in many cases.

Why does the number of layers keep increasing?

Reasons:

・Explosive increase in the number of I/Os

・Stronger separation of power and GND

・Securing shielding for high-speed signals

Recently:

・We are in a world of 10 layers → 15 layers → more than 20 layers.

More layers = exponential increases in cost, yield difficulty, and manufacturing difficulty.

The core of substrate technology evolution is finer L/S.

Typical figures:

・Conventional substrates: 20 / 20 µm

・Advanced ABF: 10 / 10 µm

・Further ahead: aiming for 5 / 5 µm or below

Challenges:

・Reliability of copper wiring

・Resist accuracy

・Etching variation

・Lower yield

Even though it is a substrate, it is becoming as difficult as a semiconductor.

For high-speed I/O, the electrical characteristics of the substrate are critical.

Main issues:

・Dielectric constant (Dk)

・Dissipation factor (Df)

・Surface roughness (skew / loss)

Requirements:

・Low-Dk, low-Df materials

・Smoother wiring surfaces

・Layer design that takes SI/PI/EMI into account

→ Substrate design is also part of SI/PI/EMI design.

Differences in Thermal Expansion (CTE Mismatch)

・Chip

・Bumps

・Substrate

・PCB

All have different CTEs.

→ Stress concentrates during temperature cycling

→ Bump fatigue and cracks.

Warpage

・Pronounced in large packages

・A cause of mounting and connection failures

Optimizing substrate materials and layer structures is essential.

Advanced ABF substrates:

・Can be made by only a limited number of manufacturers

・Require huge capital investment

・Take time to ramp up

As a result:

・Substrate shortage = products cannot be made

・Cases have arisen in which substrates, rather than foundries, become the limiting factor

Leading-edge semiconductors have entered a phase in which companies that can secure substrates win.

・Ultra-high-layer-count ABF substrates

・New low-Dk / low-Df materials

・Substrates for large packages

・Co-design of substrate × package

・Research on organic interposer technology

・Package substrates determine performance, reliability, and cost

・ABF substrates play the leading role in advanced packages

・Difficulty is rising sharply with higher layer counts and finer features

・Comprehensive electrical, thermal, and mechanical design is essential

・Supply chain constraints determine competitiveness

1.Why does the substrate become a bottleneck in advanced packages?

2.Explain why higher layer counts are unavoidable.

3.What are the particularly difficult technical challenges in making substrate L/S finer?

 

Column Supervisor: Koji Kakumoto (President, OTIS Co., Ltd.)

After studying abroad and working in planning and development at a trading company, he joined OTIS Co., Ltd. in 2011. While primarily working in the Corporate Planning Department, he has also served concurrently in manufacturing and technical divisions, and since 2018 has served as President, working to drive business growth and strengthen the organization.

 

This article is a general technical explanation intended for educational purposes and does not refer to any specific company, product, or technology.