【1】Why Is Etching at the Core of Leading-Edge Processes?
As scaling advances, the technology of removing material (etching) has become the process that determines chip performance.
The reason is simple. The latest structures require:
● Ultra-deep trenches exceeding 100:1
● Dimensional accuracy of a few nm
● Sidewalls with zero damage
● Minimal plasma damage
— so simply being able to etch is no longer enough.
At advanced nodes, it is no exaggeration to say that how ideally material can be etched = yield and performance themselves.
【2】High Aspect Ratio Etching (HAR)
An essential technology for TSV, 3D NAND, Fin/GAA, and more.
What Is a High Aspect Ratio (HAR)?
Aspect ratio = depth / width
Example: depth 10 µm, width 100 nm → AR = 100:1
Today’s 3D NAND has advanced to a region approaching 200:1.
What Makes HAR Difficult
・Sidewalls deform (bowing / tapering)
・Gas does not reach the bottom
・Reaction by-products clog the hole
・Plasma damage reduces reliability
・Ensuring selectivity at the bottom (stopping precisely at the target layer)
→ This is the area where etching equipment manufacturers around the world struggle the most.
【3】DLE (Damage-Less Etching)
With scaling, damage caused by plasma has become critical.
Resists, Low-k materials, Si channels, and the like can change their characteristics significantly with even the slightest damage.
DLE is a technology that minimizes damage while etching the structure, through measures such as:
● Low-energy ions
● Reactions centered on neutral radicals
● Avoiding excessive sputtering
It is particularly essential for:
● The nanosheet release step in GAA
● Sidewall protection at high aspect ratios
● Preventing collapse of low-dielectric-constant (Low-k) materials
【4】ALE (Atomic Layer Etching)
Like ALD in deposition, this technology etches “one atomic layer at a time” in each cycle.
Basic Steps of ALE
1) Form a reactive layer on the surface (Modification)
2) Remove “just one layer” using plasma or similar means (Removal)
By repeating these steps, dimensions can be controlled with atomic-level precision.
Where ALE Is Needed
・Channel formation in GAA
・Uniform processing of ultra-thin films
・Correction of patterning dimensions
・High-precision gate formation
It enables control at the level of a few Å—not just nm—and is a key technology for the 2nm node and beyond.
【5】The Difficulty of Etching by Material
Si (Silicon)
Relatively easy to process, but damage and roughness become major problems with scaling.
SiO₂ / SiN
Hard, and ensuring selectivity is difficult, especially when removing insulating films in GAA.
Low-k Materials
Weak and fragile. They collapse easily under plasma → low damage is essential.
Metals (TiN, W, Ru, etc.)
Plasma reactions are complex, and metal etching is one of the most difficult challenges at advanced nodes.
【6】Latest Trends (The Future of Etching)
Multi-Frequency Plasma Control
Combining high and low frequencies to control damage and directionality at the same time.
Pulsed Plasma
Stabilizes reactions through on/off control.
AI-Controlled Etching
Analyzes the plasma state in real time and optimizes it automatically.
HAR Technology for 3D NAND (From 200 Layers to 1,000 Layers)
Sidewall protection and uniformity are the biggest challenges.
Etching of Tiny Openings in the Metal Gate Generation
Technology is required to process extremely small openings without deforming their shape.
【7】Summary
● High aspect ratio etching is the most important technology in leading-edge processes
● DLE minimizes damage while etching
● ALE is a next-generation technology that enables dimensional control at the atomic-layer level
● Materials cannot be processed without understanding their individual characteristics
● New technologies such as AI control and advanced plasma are progressing
Comprehension Check
1.Name two problems that tend to occur in high aspect ratio etching.
2.Why is DLE (Damage-Less Etching) needed?
3.Explain why ALE is considered especially important in the transition from FinFET to GAA.
Column Supervisor: Koji Kakumoto (President, OTIS Co., Ltd.)
After studying abroad and working in planning and development at a trading company, he joined OTIS Co., Ltd. in 2011. While primarily working in the Corporate Planning Department, he has also served concurrently in manufacturing and technical divisions, and since 2018 has served as President, working to drive business growth and strengthen the organization.
This article is a general technical explanation intended for educational purposes and does not refer to any specific company, product, or technology.


